#include "p30f6014A.h"
Defines | |
| #define | FOSC 7.3728e6 |
| #define | PLL 8.0 |
| #define | FCY ((FOSC*PLL)/(4.0)) |
| #define | MILLISEC (FCY/1.0e3) |
| #define | MICROSEC (FCY/1.0e6) |
| #define | NANOSEC (FCY/1.0e9) |
| #define | TCY_PIC (1e9/FCY) |
| #define | INTERRUPT_DELAY (10*TCY_PIC) |
| #define | TRUE 1 |
| #define | FALSE 0 |
| #define | OUTPUT_PIN 0 |
| #define | LED0 _LATA6 |
| #define | LED1 _LATA7 |
| #define | LED2 _LATA9 |
| #define | LED3 _LATA12 |
| #define | LED4 _LATA10 |
| #define | LED5 _LATA13 |
| #define | LED6 _LATA14 |
| #define | LED7 _LATA15 |
| #define | LED0_DIR _TRISA6 |
| #define | LED1_DIR _TRISA7 |
| #define | LED2_DIR _TRISA9 |
| #define | LED3_DIR _TRISA12 |
| #define | LED4_DIR _TRISA10 |
| #define | LED5_DIR _TRISA13 |
| #define | LED6_DIR _TRISA14 |
| #define | LED7_DIR _TRISA15 |
| #define | FRONT_LED _LATC1 |
| #define | FRONT_LED_DIR _TRISC1 |
| #define | BODY_LED _LATC2 |
| #define | BODY_LED_DIR _TRISC2 |
| #define | PULSE_IR0 _LATF7 |
| #define | PULSE_IR1 _LATF8 |
| #define | PULSE_IR2 _LATG0 |
| #define | PULSE_IR3 _LATG1 |
| #define | PULSE_IR0_DIR _TRISF7 |
| #define | PULSE_IR1_DIR _TRISF8 |
| #define | PULSE_IR2_DIR _TRISG0 |
| #define | PULSE_IR3_DIR _TRISG1 |
| #define | IR0 8 |
| #define | IR1 9 |
| #define | IR2 10 |
| #define | IR3 11 |
| #define | IR4 12 |
| #define | IR5 13 |
| #define | IR6 14 |
| #define | IR7 15 |
| #define | MIC1 2 |
| #define | MIC2 3 |
| #define | MIC3 4 |
| #define | ACCX 5 |
| #define | ACCY 6 |
| #define | ACCZ 7 |
| #define | AUDIO_ON _LATF0 |
| #define | AUDIO_ON_DIR _TRISF0 |
| #define | MOTOR1_PHA _LATD0 |
| #define | MOTOR1_PHB _LATD1 |
| #define | MOTOR1_PHC _LATD2 |
| #define | MOTOR1_PHD _LATD3 |
| #define | MOTOR2_PHA _LATD4 |
| #define | MOTOR2_PHB _LATD5 |
| #define | MOTOR2_PHC _LATD6 |
| #define | MOTOR2_PHD _LATD7 |
| #define | MOTOR1_PHA_DIR _TRISD0 |
| #define | MOTOR1_PHB_DIR _TRISD1 |
| #define | MOTOR1_PHC_DIR _TRISD2 |
| #define | MOTOR1_PHD_DIR _TRISD3 |
| #define | MOTOR2_PHA_DIR _TRISD4 |
| #define | MOTOR2_PHB_DIR _TRISD5 |
| #define | MOTOR2_PHC_DIR _TRISD6 |
| #define | MOTOR2_PHD_DIR _TRISD7 |
| #define | CAM_RESET _LATC13 |
| #define | CAM_RESET_DIR _TRISC13 |
| #define | SIO_D _LATG3 |
| #define | SIO_D_DIR _TRISG3 |
| #define | SIO_C _LATG2 |
| #define | SIO_C_DIR _TRISG2 |
| #define | INPUT_PIN 1 |
| #define | BATT_LOW _RF1 |
| #define | BATT_LOW_DIR _TRISF1 |
| #define | SELECTOR0 _RG6 |
| #define | SELECTOR1 _RG7 |
| #define | SELECTOR2 _RG8 |
| #define | SELECTOR3 _RG9 |
| #define | SELECTOR0_DIR _TRISG6 |
| #define | SELECTOR1_DIR _TRISG7 |
| #define | SELECTOR2_DIR _TRISG8 |
| #define | SELECTOR3_DIR _TRISG9 |
| #define | REMOTE _RF6 |
| #define | REMOTE_DIR _TRISF6 |
| #define | CAM_DATA PORTD; |
| #define | CAM_y0 _RD8 |
| #define | CAM_y1 _RD9 |
| #define | CAM_y2 _RD10 |
| #define | CAM_y3 _RD11 |
| #define | CAM_y4 _RD12 |
| #define | CAM_y5 _RD13 |
| #define | CAM_y6 _RD14 |
| #define | CAM_y7 _RD15 |
| #define | CAM_y0_DIR _TRISD8 |
| #define | CAM_y1_DIR _TRISD9 |
| #define | CAM_y2_DIR _TRISD10 |
| #define | CAM_y3_DIR _TRISD11 |
| #define | CAM_y4_DIR _TRISD12 |
| #define | CAM_y5_DIR _TRISD13 |
| #define | CAM_y6_DIR _TRISD14 |
| #define | CAM_y7_DIR _TRISD15 |
| #define | CAM_PWDN _RC2 |
| #define | CAM_VSYNC _RC4 |
| #define | CAM_HREF _RC3 |
| #define | CAM_PCLK _RC14 |
| #define | CAM_PWDN_DIR _TRISC2 |
| #define | CAM_VSYNC_DIR _TRISC4 |
| #define | CAM_HREF_DIR _TRISC3 |
| #define | CAM_PCLK_DIR _TRISC14 |
| #define | NOP() {__asm__ volatile ("nop");} |
| #define | CLRWDT() {__asm__ volatile ("clrwdt");} |
| #define | SLEEP() {__asm__ volatile ("pwrsav #0");} |
| #define | IDLE() {__asm__ volatile ("pwrsav #1");} |
| #define | INTERRUPT_OFF() {__asm__ volatile ("disi #10000");} |
| #define | INTERRUPT_ON() {__asm__ volatile ("disi #2");} |
| #define | RESET() {__asm__ volatile ("reset");} |
| #define | STOP_TMR1 IEC0bits.T1IE = 0 |
| #define | STOP_TMR2 IEC0bits.T2IE = 0 |
| #define | STOP_TMR3 IEC0bits.T3IE = 0 |
| #define | STOP_TMR4 IEC1bits.T4IE = 0 |
| #define | STOP_TMR5 IEC1bits.T5IE = 0 |
| #define ACCX 5 |
| #define ACCY 6 |
| #define ACCZ 7 |
| #define AUDIO_ON _LATF0 |
| #define AUDIO_ON_DIR _TRISF0 |
| #define BATT_LOW _RF1 |
| #define BATT_LOW_DIR _TRISF1 |
| #define BODY_LED _LATC2 |
| #define BODY_LED_DIR _TRISC2 |
| #define CAM_DATA PORTD; |
| #define CAM_HREF _RC3 |
| #define CAM_HREF_DIR _TRISC3 |
| #define CAM_PCLK _RC14 |
| #define CAM_PCLK_DIR _TRISC14 |
| #define CAM_PWDN _RC2 |
| #define CAM_PWDN_DIR _TRISC2 |
| #define CAM_RESET _LATC13 |
| #define CAM_RESET_DIR _TRISC13 |
| #define CAM_VSYNC _RC4 |
| #define CAM_VSYNC_DIR _TRISC4 |
| #define CAM_y0 _RD8 |
| #define CAM_y0_DIR _TRISD8 |
| #define CAM_y1 _RD9 |
| #define CAM_y1_DIR _TRISD9 |
| #define CAM_y2 _RD10 |
| #define CAM_y2_DIR _TRISD10 |
| #define CAM_y3 _RD11 |
| #define CAM_y3_DIR _TRISD11 |
| #define CAM_y4 _RD12 |
| #define CAM_y4_DIR _TRISD12 |
| #define CAM_y5 _RD13 |
| #define CAM_y5_DIR _TRISD13 |
| #define CAM_y6 _RD14 |
| #define CAM_y6_DIR _TRISD14 |
| #define CAM_y7 _RD15 |
| #define CAM_y7_DIR _TRISD15 |
| #define CLRWDT | ( | ) | {__asm__ volatile ("clrwdt");} |
| #define FALSE 0 |
| #define FCY ((FOSC*PLL)/(4.0)) |
| #define FOSC 7.3728e6 |
| #define FRONT_LED _LATC1 |
| #define FRONT_LED_DIR _TRISC1 |
| #define IDLE | ( | ) | {__asm__ volatile ("pwrsav #1");} |
| #define INPUT_PIN 1 |
| #define INTERRUPT_DELAY (10*TCY_PIC) |
| #define INTERRUPT_OFF | ( | ) | {__asm__ volatile ("disi #10000");} |
| #define INTERRUPT_ON | ( | ) | {__asm__ volatile ("disi #2");} |
| #define IR0 8 |
| #define IR1 9 |
| #define IR2 10 |
| #define IR3 11 |
| #define IR4 12 |
| #define IR5 13 |
| #define IR6 14 |
| #define IR7 15 |
| #define LED0 _LATA6 |
| #define LED0_DIR _TRISA6 |
| #define LED1 _LATA7 |
| #define LED1_DIR _TRISA7 |
| #define LED2 _LATA9 |
| #define LED2_DIR _TRISA9 |
| #define LED3 _LATA12 |
| #define LED3_DIR _TRISA12 |
| #define LED4 _LATA10 |
| #define LED4_DIR _TRISA10 |
| #define LED5 _LATA13 |
| #define LED5_DIR _TRISA13 |
| #define LED6 _LATA14 |
| #define LED6_DIR _TRISA14 |
| #define LED7 _LATA15 |
| #define LED7_DIR _TRISA15 |
| #define MIC1 2 |
| #define MIC2 3 |
| #define MIC3 4 |
| #define MICROSEC (FCY/1.0e6) |
| #define MILLISEC (FCY/1.0e3) |
| #define MOTOR1_PHA _LATD0 |
| #define MOTOR1_PHA_DIR _TRISD0 |
| #define MOTOR1_PHB _LATD1 |
| #define MOTOR1_PHB_DIR _TRISD1 |
| #define MOTOR1_PHC _LATD2 |
| #define MOTOR1_PHC_DIR _TRISD2 |
| #define MOTOR1_PHD _LATD3 |
| #define MOTOR1_PHD_DIR _TRISD3 |
| #define MOTOR2_PHA _LATD4 |
| #define MOTOR2_PHA_DIR _TRISD4 |
| #define MOTOR2_PHB _LATD5 |
| #define MOTOR2_PHB_DIR _TRISD5 |
| #define MOTOR2_PHC _LATD6 |
| #define MOTOR2_PHC_DIR _TRISD6 |
| #define MOTOR2_PHD _LATD7 |
| #define MOTOR2_PHD_DIR _TRISD7 |
| #define NANOSEC (FCY/1.0e9) |
| #define NOP | ( | ) | {__asm__ volatile ("nop");} |
| #define OUTPUT_PIN 0 |
| #define PLL 8.0 |
| #define PULSE_IR0 _LATF7 |
| #define PULSE_IR0_DIR _TRISF7 |
| #define PULSE_IR1 _LATF8 |
| #define PULSE_IR1_DIR _TRISF8 |
| #define PULSE_IR2 _LATG0 |
| #define PULSE_IR2_DIR _TRISG0 |
| #define PULSE_IR3 _LATG1 |
| #define PULSE_IR3_DIR _TRISG1 |
| #define REMOTE _RF6 |
| #define REMOTE_DIR _TRISF6 |
| #define RESET | ( | ) | {__asm__ volatile ("reset");} |
| #define SELECTOR0 _RG6 |
| #define SELECTOR0_DIR _TRISG6 |
| #define SELECTOR1 _RG7 |
| #define SELECTOR1_DIR _TRISG7 |
| #define SELECTOR2 _RG8 |
| #define SELECTOR2_DIR _TRISG8 |
| #define SELECTOR3 _RG9 |
| #define SELECTOR3_DIR _TRISG9 |
| #define SIO_C _LATG2 |
| #define SIO_C_DIR _TRISG2 |
| #define SIO_D _LATG3 |
| #define SIO_D_DIR _TRISG3 |
| #define SLEEP | ( | ) | {__asm__ volatile ("pwrsav #0");} |
| #define STOP_TMR1 IEC0bits.T1IE = 0 |
| #define STOP_TMR2 IEC0bits.T2IE = 0 |
| #define STOP_TMR3 IEC0bits.T3IE = 0 |
| #define STOP_TMR4 IEC1bits.T4IE = 0 |
| #define STOP_TMR5 IEC1bits.T5IE = 0 |
| #define TCY_PIC (1e9/FCY) |
| #define TRUE 1 |
1.5.4