I2C
Detailed Description
This software allows using the I2C hardware module on a DsPic30f60xx in a master mode for a single master system.
This module manage the I2C basics functions (low level I2C functions). They are made to perform the basics tasks like:
The I2C-bus supports any IC fabrication process (NMOS, CMOS, bipolar). Two wires, serial data (SDA) and serial clock (SCL), carry information between the devices connected to the bus. Each device is recognized by a unique address (whether it's a microcontroller, LCD driver, memory or keyboard interface) and can operate as either a transmitter or receiver, depending on the function of the device.
The I2C-bus is a multi-master bus. This means that more than one device capable of controlling the bus can be connected to it. As masters are usually microcontrollers, let's consider the case of a data transfer between two microcontrollers connected to the I2C-bus.
This highlights the master-slave and receiver-transmitter relationships to be found on the I2C-bus. It should be noted that these relationships are not permanent, but only depend on the direction of data transfer at that time. The transfer of data would proceed as follows:
1) Suppose microcontroller A wants to send information to module B:
- microcontroller A (master), addresses module B (slave)
- microcontroller A (master-transmitter), sends data to module B (slave-receiver)
- microcontroller A terminates the transfer
2) If microcontroller A wants to receive information from module B:
- microcontroller A (master) addresses module B (slave)
- microcontroller A (master-receiver) receives data from module B (slave-transmitter)
- microcontroller A terminates the transfer.
Even in this case, the master (microcontroller A) generates the timing and terminates the transfer.
Within the procedure of the I2C-bus, unique situations arise which are defined as START (S) and STOP (P) conditions.
A HIGH to LOW transition on the SDA line while SCL is HIGH is one such unique case. This situation indicates a START condition.
A LOW to HIGH transition on the SDA line while SCL is HIGH defines a STOP condition.
START and STOP conditions are always generated by the master. The bus is considered to be busy after the START condition. The bus is considered to be free again a certain time after the STOP condition.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition. In this respect, the START (S) and repeated START (Sr) conditions are functionally identical). Detection of START and STOP conditions by devices connected to the bus is easy if they incorporate the necessary interfacing hardware.
Every byte put on the SDA line must be 8-bits long (char type).
Acknowledge:
Data transfer with acknowledge is obligatory. The acknowledge-related clock pulse is generated by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse.
The receiver must pull down the SDA line during the acknowledge clock pulse so that it remains stable LOW during the HIGH period of this clock pulse. Of course, set-up and hold times must also be taken into account.
Usually, a receiver which has been addressed is obliged to generate an acknowledge after each byte has been received.
When a slave doesn't acknowledge the slave address (for example, it's unable to receive or transmit because it's performing some real-time function), the data line must be left HIGH by the slave. The master can then generate either a STOP condition to abort the transfer, or a repeated START condition to start a new transfer. If a slave-receiver does acknowledge the slave address but, some time later in the transfer cannot receive any more data bytes, the master must again abort the transfer. This is indicated by the slave generating the not-acknowledge on the first byte to follow. The slave leaves the data line HIGH and the master generates a STOP or a repeated START condition.
If a master-receiver is involved in a transfer, it must signal the end of data to the slave-transmitter by not generating an acknowledge on the last byte that was clocked out of the slave. The slave-transmitter must release the data line to allow the master to generate a STOP or repeated START condition.
On the e-puck, the microcontroller is always the master.
The functions of the files e_I2C_master_module.c and e_I2C_master_module.h are low level I2C functions.
They are made to perform the basics tasks like:
The functions of the files e_I2C_protocol.c and e_I2C_protocol.h are made to directly send or receive data from or to a specified slave.
For more information about I2C:
- Author:
- Doc: Jonathan Besuchet
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